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Thermal-Aware Floorplanning Co
  • 所属机构名称：清华大学
  • 成果类型：会议
  • 相关项目：SOC低功耗电路与系统设计方法
作者： Saihua Lin, Huazhong Yang, Ron
同会议论文项目
SOC低功耗电路与系统设计方法
期刊论文 55 会议论文 59 著作 2
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Hierarchical Approach for Incr
A low power baseband filter fo
Gibbs sampling in power grid a
A low-voltage RF Amplifier usi
Comb-pattern optimal pilot in
An incremental floorplanner ba
Two-phase Fine-grain Sleep Tra
A New Thermal-Conscious System
Low Clock Swing D Flip-flops D
Hierarchical genetic algorithm
A new ROMless twiddle factor g
Genetic Algorithm Based Fine-G
Low power tasks mapping for DV
Modifications for Reliability
Low Clock Swing D Flip-Flops D
A Noise Reduced Digitally-Cont
Accurate and Fast Estimation o
Platform-based design for OFDM
A Precise Bandgap Reference wi
A low power ROM-less direct di
New Considerations for High Fr
A high gain low offset amplifi
Low-Power and Hardware Efficie
Processor Load Analysis for Mo
6.33mW MPEG audio decoding on
System level asynchronous virt
A Novel Error Amplifier Used i
A Class D Audio Power Amplifie
Analysis of Hybrid Translinear
A new low-power readout shift
Design of low power buffer usi
A Novel Low-Power and High-Spe
Combining Genetic Algorithms B
New Frequency Divider with 8 O
Fast simulation of interconnec
Translinear Loop Principle and
Signal-path level assignment f
A High Precision Bandgap Refer
Improved multiuser detector fo
Low power switched-capacitor c
Load Share Controller IC and i
Fine-grain Sleep Transistor Pl
Thermal vs Energy Optimization
A new modulation scheme for DR
IR-drop reduction through comb
Improved wideband low distorti
A BiCMOS Low Voltage Low Disto
Optimal partitioning of formal
Design of Low Power CMOS Cryst
A new adaptive delay method fo
A dynamic CMOS comparator with
A programmable-gain chopper-st
The design of CMOS RF low nois
An iterative delay model for i
Design considerations of a new
A robust and low complexity co
Modeling of PMOS NBTI Effect C
System level synthesis on I/O