研究了适用于TD-SCDMA的Turbo码解码器的算法及硬件实现,提出了一级流水的单SISO结构,并结合滑窗MAX-LOG-MAP算法使得面积,功耗,存储器的开销大大减小,最后给出了综合结果。
The algorithm and hardware architecture of the turbo decoder is studied which can be used in TD-SCDMA systems. An architecture called one level pipeline single SISO is introducsd and with slip window MAX-LOG-MAP algorithm is used, which reduces area, power and memory of the chip. The result of synthesis is also given.