中文摘要：

提出了面向高清的视频格式转换系统，设计了一种基于状态机且适用于视频格式转换的DDRSDRAM控制器系统结构和状态转移控制流程。该控制器能实现2片DDRSDRAM乒乓读写切换，完成整个视频的传输。最后对控制器的电路进行了仿真，并在Xilinx的Spartan3E系列上实现了DDRSDRAM的连续读写，为集成电路技术中解决数据缓存系统的瓶颈问题提供了新的设计思路。该控制器处理速度快、稳定性好、占用的芯片资源少，并直接面向HDMI接口标准。

英文摘要：

In this paper, the video format conversion system for high-definition is proposed and a DDR SDRAM controller system architecture based on state machine and the state transfer control process for video format conversion system is designed. The two ping-pong DDR SDRAM switches are used to read and write for implementation of the entire video transmission in the controller. The circuit of controller is simulated and the DDR SDRAM is read and written continuously in a Xilinx Spartan3E FPGA. The design is a solution to the bottleneck problem of data caching system in the area of integrated circuit. The controller is processing speed]y, good stability, spending less chip resources, and directly facing to the HDMI interface standard.