提出了一种基于5级流水线的高精度向量乘法器的二维DCTVLSI结构。采用一维DCT行处理,转置RAM存储器,一维DCT列处理的流水线结构代替复用一维DcT算法以提高速度,并且在一维DCT算法模块中,对于系数乘法,采用并行乘法的结构,可以进一步提高运算速度。在高精度方面,采用移位的方案,精度精确到小数点后5位,满足高精度的需求。在FPGA平台上仿真结果表明,与传统的2DDCT设计相比,可以减少硬件资源,降低功耗,提高精度。
In this paper, a 2D-DCT VLSI architecture based on 5-level pipeline and high-precision vector multiplier is proposed. In order to improve the processing speed, the pipeline architecture of 1D-DCT-row processing, the transpose RAM memory and 1D-DCT-column processing is used instead of using duplicated ID-DCT. In the design of 1D-DCT, parallel multiplier structure is used for factor multiplication, which can further improve the computing speed. The use of shit program and accurate to the 5th digits after the decimal point, which can meet the needs of high-precision. Finally, the simulation results on FPGA show that this design uses less multipliers, low power consumption and high-precision which compared to the traditional design of 2D-DCT.