对等精度频率测量的基本方法进行了两方面的改进;一方面在不提高系统工作频率和延长测量门限时间的前提下,通过对基准时钟信号计数值的修正,进一步提高了测量精度;另一方面利用对被测信号的自适应分频,消除了预置门限时间带来的不足,简化了同步逻辑电路,提高了系统可靠性,实现了测量门限时间的自动寻优;在基于可编程逻辑器件CPLD以及DSP芯片的硬件系统中,实现了范围为1Hz-2MHz、相对误差不大于10^-4的频率测量,进行了相关实验验证并给出了实验结果。
The equal--precision technique of digital frequency measurement is analyzed and improved. The relative error of the measuring result is decreased by amending the counting result of the reference clock signal. Through self--adapting frequency demultiplication of the measured signal, the logic circuit is simplified, the reliability of system is increased and the automatic optimization of time--limit gate is realized. The improved method is verified on the hardware system based on CPLD and DSP by measuring a range from 1Hz to 2MHz digital frequency signal. The experimental result is given.