中文摘要：

提出了一种工作在低电压下的宽动态范围、低噪声、低失真度的可用于语音信号采集系统的自动增益控制电路（AGC）.该AGC环路采用反馈式结构,数字式增益控制.设计指标为1V工作电压,0~40dB增益动态范围,2dB增益步长,8kHz带宽.采用π型电阻网络作为环路中可变增益放大器的无源反馈网络,提高增益的准确性并实现增益在对数单位下的线性.采用滞回比较器来减弱当峰值检测器输出信号在阈值电压附近小幅度快速变化而引起的抖动.基于UMC180nm CMOS工艺完成电路及版图设计,芯片面积约为0.45mm2.提取版图寄生参数后的电路仿真结果显示,AGC环路的功耗在1V工作电压下约为0.17mW;AGC的增益动态范围为0~40.2dB,增益步长为2dB,增益误差不大于0.2dB.总谐波失真在输出信号1kHz,峰峰值为0.4V时小于-70dB.AGC中可变增益放大器单位增益时,在音频（0.02~20kHz）范围内的输出积分噪声小于5μVRMS.

英文摘要：

This paper presents a kind of Automatic Gain Control （AGC） circuits which can be used in speech signal acquisition system, it has high gain range, low noise and high linearity. The proposed AGC is based on feedback topologies and the gain is digital controlled. The design indexes are 1 V supply voltage, 0~40 dB gain range, 2 dB gain step, 8 kHz bandwidth. A n-type resistors network is used in the Programmable Gain Amplifier （PGA） as the passive feedback device to realize gain linearity in decibels and increase the gain accuracy. The hysteresis comparator eliminate the chattering effects when the output signal of Peak Detector changes rapidly around the threshold. The design is implemented in 0. 18μm CMOS and occupies an active area of 0. 41 mm2. The power consumption of AGC is about 0. 17 mW at 1 V supply voltage. The gain of AC, C loop ranges from 0 dB to 40. 2 dB in 2 dB step with gain error not more than 0. 2 dB. The total harmonic distortion （THD） is below --70 dB over the audio frequencies at 1 kHz, 0. 4-Vpp differential output. The integrated noise in the audio range （20 Hz~20 kHz） is less than 5tIVRMS when the gain of PGA is set at 0 dB.