中文摘要：

改进 IC 的收益的一个新格子更少路由器被介绍。产量的改进被减少电路失败是可能的发生的临界区完成。更少的区域路由器从一个新奇成本函数有益于在路由过程期间计算临界区的这个格子，和启发式的联盟者在导致临界区是可能的更少的芯片区域上放模式。路由器也考虑另外的目的，例如路由布通率和网长度。获得更多的灵活性和更高的布通率利用格子更少路由。当超过 99% 维持路由布通率时，试验性的结果证明临界区被 21% 有效地平均减少。电子增补材料这篇文章(doi:10.1007/s11390-007-9092-9 ) 的联机版本包含增补材料，它对授权用户可得到。

英文摘要：

A new gridless router to improve the yield of IC layout is presented. The improvement of yield is achieved by reducing the critical areas where the circuit failures are likely to happen. This gridless area router benefits from a novel cost function to compute critical areas during routing process, and heuristically lays the patterns on the chip area where it is less possible to induce critical area. The router also takes other objectives into consideration, such as routing completion rate and nets length. It takes advantage of gridless routing to gain more flexibility and a higher completion rate. The experimental results show that critical areas are effectively decreased by 21% on average while maintaining the routing completion rate over 99%.