利用微芯片制备技术制备了带有电极的原位电学薄膜芯片,并结合自制的原位透射电镜样品台,实现了低温下透射电子显微镜聚焦电子束对InAs纳米线的精细刻蚀以及不同温度下的原位电学性能测量。研究发现,随着刻蚀区域截面积的减小,纳米线的电导率也随之减小。当纳米线的截面积从大于10000 nm^2刻蚀至约800 nm^2时,纳米线电导的减小速率与截面积的减小具有线性关系。同时利用低温聚焦电子束刻蚀,在InAs纳米线上原位制备了一个10 nm的纳米点,并在77与300 K下对该纳米点进行了电学性能测量。通过测量发现在77 K时出现库仑阻塞效应,发生了电子隧穿现象;而300 K时,热扰动提供的能量使这种现象消失。
In this paper, the in-situ membrane chips with the electrodes are fabricated with the micro-chip technique. Using a home-made in-situ holder, the fine lithography on the InAs nanowires is demonstrated by the focused electron beam at low temperature in a transmission electron microscope. It is found that the conductance of the nanowires decreases linearly with the cross section area decreasing from bigger than 10000 nm^2 down to 800 nm^2 by lithography. With this lithography at low temperature, a 10 nm nano-dot is fabricated on an InAs nanowire, and its electrical properties are measured at 77 and 300 K. The coulomb blockade effect is observed at 77 K due to the electron tunneling, while this phenomenon disappears at 300 K due to the stronger thermal fluctuation.