中文摘要：

提出基于宏单元（macrocell）的异步电路设计流程,由于在流程中尽量与现有的同步电路设计EDA工具兼容,降低了技术难度,提高了开发效率.基于该流程实现了0.35μm工艺条件下的32位异步乘法器.经过与相同工艺条件下,具有相同数据通路结构的同步乘法器比较,异步乘法器的性能与同步乘法器相当,而且面积更小、功耗更低.

英文摘要：

An asynchronous circuits design flow based on macrocell is presented in this paper. Being compatible with current EDA tools for synchronous design, this flow can decrease the difficulties of design and improve the efficiency as well. Based on this flow, a 32-bit asynchronous multiplier in 0. 359m process is designed. Compared with the synchronous multiplier of the same data path, the asynchronous multiplier has the similar performance but with smaller area size and lower power dissipation.