为提高密码芯片抵抗差分功耗分析(DPA)攻击的能力,提出了一种用于DPA防御的新型电流平整电路.电路设计基于0.18μm CMOS工艺,包括电流检测和电流注入补偿2个模块,占用芯片面积9×103μm2.仿真结果表明:该电路能够在较宽的频率范围内有效工作,可以将电源端的电流变化削减90%左右,增加了DPA攻击的难度;与算法级或逻辑级的DPA防御措施相比,该电路独立于密码算法,几乎不影响密码芯片原有设计流程,能够在设计的最终阶段作为附加电路与原有密码算法核心电路配合使用,提供晶体管级DPA防御方案.
A new design of current flattening circuit was proposed to improve the resistance against differential power analysis (DPA) attack. The proposed circuit, consisting of a current sensor module and a current injection module, was implemented in 0.18 μm CMOS (complementary metal oxide semiconductor) process, with only 9 × 10^3μm^2 chip area occupied. Simulation results show that the circuit can work effectively within a wide frequency range and the variations in the power supply current profile is attenuated by 90% or so, which increases the difficulty of the DPA attack. Compared with the algorithm or logical level countermeasures, the circuit features minimal existing chip design flow impacts with its cryptographic algorithms independence. It can be added to the existing cryptographic core as a subsidiary circuit at the final design stage to provide a transistor level countermeasure against DPA.