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Power Reduction through Specific Instruction Scheduling based on Hardware/Software Co-Design
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  • 相关项目：可编程可重构SOC芯片系统结构及关键技术
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可编程可重构SOC芯片系统结构及关键技术
期刊论文 37 会议论文 36
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SoC 系统级设计方法与技术
Cluster-based Placement for Multilevel Hierarchical FPGA
An integrated circuit with improved logic cells
一种具有交叉链接的可编程互连网络的集成电路
Speedup Factor Estimation through Dynamic Behavior Analysis for FPGA
A Programmable Interconnect Network For Logic Array
Low Overhead Placement-intact Logic Perturbations for FPGA Performance
Retiming Optimization Techniques for Designing Flip-flop in VLSI Circuity
Even Distribution Evaluation in Random Stimulus Generation
DFM-aware Routing for Yield Enhancement
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Fast Custom Instruction Identification Algorithm Based on Basic Convex Pattern Model for Supporting
交替型暗域相移掩模的并行算法
高层次综合中面向功耗优化的方法与技术
High Level Synthesis with Multiple supply Voltages for Energy and Combined Peak Power Minimization
New Timing and Routability Driven Placement Algorithms for FPGA Synthesis
λ-OAT: λ-Geometry Obstacle-Avoiding Tree Construction With O(n log n) Complexity
RTL验证中的混合可满足性求解
利用SMT约束分解方法求解RTL可满足性问题
CIG-EM：一种面向通信综合的通信信息图提取方法
集成电路物理设计中的快速可布性评估算法
考虑热效应的资源数量分配算法
岛式FPGA线长驱动快速布局算法
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