中文摘要：

GALS（全局异步、局部同步）架构适用于NoC的时钟分布,但现有的GALS需要定制地设计异步包装电路,不利于验证和集成.采用通用的数字ASIC设计流程,在仅使用已有标准单元的情况下,提出了一种新的基于FIFO的异步包装.通过此包装电路,实现了一个信号传输只需2步操作,提高了通信吞吐率.实验结果表明该包装电路在吞吐率和延迟上获得了显著改进.

英文摘要：

GALS（Globally asynchronous,locally synchronous） architecture is a promising solution for NoC clock distributing.However,traditional implementations of asynchronous wrapper for GALS require certain designed circuits,which are not suitable for verification and IP merging.This paper proposed a new FIFO-based asynchronous wrapper,which implemented using only standard cell and optimized in a standard digital ASIC flow.It achieves high throughput by this wrapper,which needs only two transitions per symbol.The results show that this wrapper can provide great improvement in throughput and latency.