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中文摘要：
针对电路噪声对开关电容∑-ΔADC性能的限制，分析了开关电容∑-ΔADC电路噪声的特征和计算噪声的算法，提出了时域建立ADC电路噪声模垄的建模方法，并采用Simulink仿真工具建立了噪声行为模型。建立了一个三阶四位量化器的开关电容∑-ΔADC的噪声行为仿真模型，对仿真和测量结果进行了分析与比较，验证了时域模型的有效性。
英文摘要：
Referring to the major circuitry noise limitation on the performances of switched capacitor sigma-delta analog-to-digital converters （∑-Δ ADC）, the noisy characteristics were analyzed and an algorithms to calculate the noise power was proposed. Next, the noisy behavioral modeling in time-domain was performed with the Simulink tool. A noisy behavioral simulation model for the three-order four-bit quantizer switched capacitor ∑-ΔADC was established. The corresponding simulation results were analyzed and compared with the measured data, which verified its validity.
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