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A fast transient response low dropout regulator with current control methodology
  • ISSN号:1674-4926
  • 期刊名称:Journal of Semiconductors
  • 时间:0
  • 页码:0850071-0850077
  • 分类:TN624[电子电信—电路与系统] TN248.4[电子电信—物理电子学]
  • 作者机构:[1]School of Computer, National University of Defense Technology, Changsha 410073, China
  • 相关基金:Project supported by the National New Century Excellent Talents in University; the Program for Changjiang Scholars and Innovative Research Team in University of China; the National Natural Science Foundation of China(Nos.61076036,60906009)
  • 相关项目:抗辐射高速A/D数据转换器的数字校正关键技术研究
中文摘要:

<正>A transient performance optimized CCL-LDO regulator is proposed.In the CCL-LDO,the control method of the charge pump phase-locked loop is adopted.A current control loop has the feedback signal and reference current to be compared,and then a loop filter generates the gate voltage of the power MOSFET by integrating the error current.The CCL-LDO has the optimized damping coefficient and natural resonant frequency, while its output voltage can be sub-l-V and is not restricted by the reference voltage.With a 1μF decoupling capacitor,the experimental results based on a 0.13μm CMOS process show that the output voltage is 1.0 V;when the workload changes from 100μA to 100 mA transiently,the stable dropout is 4.25 mV,the settling time is 8.2μs and the undershoot is 5.11 mV;when the workload changes from 100 mA to 100μA transiently,the stable dropout is 4.25 mV,the settling time is 23.3μs and the overshoot is 6.21 mV.The PSRR value is more than -95 dB.Most of the attributes of the CCL-LDO are improved rapidly with a FOM value of 0.0097.

英文摘要:

A transient performance optimized CCL-LDO regulator is proposed.In the CCL-LDO,the control method of the charge pump phase-locked loop is adopted.A current control loop has the feedback signal and reference current to be compared,and then a loop filter generates the gate voltage of the power MOSFET by integrating the error current.The CCL-LDO has the optimized damping coefficient and natural resonant frequency, while its output voltage can be sub-l-V and is not restricted by the reference voltage.With a 1μF decoupling capacitor,the experimental results based on a 0.13μm CMOS process show that the output voltage is 1.0 V;when the workload changes from 100μA to 100 mA transiently,the stable dropout is 4.25 mV,the settling time is 8.2μs and the undershoot is 5.11 mV;when the workload changes from 100 mA to 100μA transiently,the stable dropout is 4.25 mV,the settling time is 23.3μs and the overshoot is 6.21 mV.The PSRR value is more than -95 dB.Most of the attributes of the CCL-LDO are improved rapidly with a FOM value of 0.0097.

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期刊信息
  • 《半导体学报:英文版》
  • 中国科技核心期刊
  • 主管单位:中国科学院
  • 主办单位:中国电子学会 中国科学院半导体研究所
  • 主编:李树深
  • 地址:北京912信箱
  • 邮编:100083
  • 邮箱:cjs@semi.ac.cn
  • 电话:010-82304277
  • 国际标准刊号:ISSN:1674-4926
  • 国内统一刊号:ISSN:11-5781/TN
  • 邮发代号:2-184
  • 获奖情况:
  • 90年获中科院优秀期刊二等奖,92年获国家科委、中共中央宣传部和国家新闻出版署...,97年国家科委、中共中央中宣传部和国家新出版署三等奖,中国期刊方阵“双效”期刊
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  • 被引量:7754