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System-level Buffer Allocation for Application Specific Network-on-chip with Wormhole Routing
ISSN号:0256-4602
期刊名称:IETE Technical Review
时间:2012.12
页码:482-491
相关项目:片上网络的通信性能-功耗联合建模与优化设计
作者:
J. Wang|Y. Li|Q. Peng|
同期刊论文项目
片上网络的通信性能-功耗联合建模与优化设计
期刊论文 12
会议论文 2
同项目期刊论文
A Performance Analytical Strategy for Network-on-Chip Router with Input Buffer Architecture
A Novel Model of Computation for Software Synthesis Based on Data Frame Driving.
An Efficient Link Bandwidth Design Method for Application-specific Network-on-chip
A Novel Parallel Viterbi Decoding Scheme for NoC-Based Software-Defined Radio System
A Genetic Algorithm for Task Scheduling on NoC Using FDH Cross Efficiency
A Parallel Viterbi Algorithm for Low Latency TBCC Decoding.
A New CDMA Encoding/DecodingMethod for on Chip Communication Network
An Energy-efficient Scheduling Algorithm forComputation-Intensive Tasks on NoC-based MPSoCs
A System-level Bandwidth Design Method for Wormhole Network-on-Chip
A Performance Analytical Strategy for Network-on-ChipRouter with Input Buffer Architecture.
A List Simulated Annealing Algorithm for Task Scheduling on Network-on-Chip.