介绍了一种适用于堆叠芯片的封装结构.采用层压、机械铣刀开槽等工艺获得Cavity基板,通过引线键合(wire bonding,WB)和倒装焊(flip chip,FC)两种方式实现堆叠芯片与基板的互连,并将堆叠芯片埋入Cavity基板.最后,将包含4款有源芯片和22个无源器件的小系统高密度集成在一个16 mm×16 mm的标准球栅阵列封装(ball grid array,BGA)封装体内.相比较于传统的二维封装结构,该封装结构将封装面积减小了40%,封装高度减小500 μm左右,并将堆叠芯片与基板的互连空间增加了2倍.对这款封装结构的设计过程进行了详细的阐述,并验证了该封装设计的工艺可行性.
A package design for die-stacking system was presented.The cavity-substrate was fabricated by lamination and mechanically milling technology.Hybrid interconnection including both wire bonding (WB) and flip chip (FC) was used.The stacked dies were embedded into the cavity substrate.Finally,four chips and twenty-two passives were packed in a 16 mm × 16 mm standard ball grid array (BGA) package.In contrast with earlier 2D package design version,the packaging area was reduced by 40% and the package height was decreased by about 500 μm.In addition,the fan-out area for the stacked die was tripled.The design progress and how the design was realized were delicately elaborated.