提出了一种面向片上系统、不依赖片外电容的CMOS低压差稳压器.通过采用片上极点分离技术和片上零极点抵消技术,保证了没有片外电容情况下低压差稳压器的稳定性.芯片通过华润上华0.5μm CMOS工艺进行了流片.芯片核心区域(不包括焊盘)尺寸为600μm×480μm.输入电压变化造成的输出电压变化偏差在±0.21%以内.静态电流为39.8μA.10kHz处的电源抑制比为-34dB.100Hz和100kHz处的输出噪声电流谱密度分别为1.65和0.89μV/Hz~(1/2).
A stable CMOS low drop-out regulator without an off-chip capacitor for system-on-chip application is presen- ted. By using an on-chip pole splitting technique and an on-chip pole-zero canceling technique, high stability is achieved without an off-chip capacitor. The chip was implemented in CSMC's 0.5μm CMOS technology and the die area is 600μm×480μm. The error of the output voltage due to line variation is less than -+ 0.21% ,and the quiescent current is 39.8μA. The power supply rejection ratio at 100kHz is -33.9dB, and the output noise spectral densities at 100Hz and 100kHz are 1.65 and 0.89μV √Hz, respectively.