中文摘要：

针对现代多CPU的微机保护装置中不同处理器之间的信息交互采用外置存储器，系统正常运行容易受到现场复杂电磁环境干扰的问题，采用了片内存储器实现多处理器之间的交互．以片内存储器为主体构建多核芯片的多层次存储结构，并采用基于消息机制的共享信箱完成处理器之间的信息交互．利用排队论模型详尽地分析了共享信箱中数据FIFO的性能与需求，继而推导出适用于多任务系统中数据FIFO的深度经验公式．

英文摘要：

The principal microprocessor relay protective equipments always use off-chip memories to accomplish interactive services between CPU. In all probability, it would be easily interfered in extremely complex electromagnetic environment. On-chip memory is an available way to decrease efficiently the electromagnetic interference＇s influence. This paper uses on-chip memories to construct the multi-level memory hierarchy, and put forward a shared box unit based on message communication mechanism to implement interaction and communication between two processor cores. It also analyses design parameters of first input first output random access memory （RAM） in the shared box unit with the queuing theory, and then derives an empirical formula of data FIFO depth.