中文摘要：

基于Petri网的数字系统的建模及其硬件实现方法已经得到了广泛的研究，然而现有的方法主要适用于同步电路，由此提出了一种基于Petri网的数字系统建模和VHDL实现的新方法。首先定义了一种广义同步自控网系统，解决了数字系统的Petri网建模问题。基于一种带优先级的多输入多时钟D触发器，设计了对应的软IP核，进而探讨了广义同步自控网系统模型到VHDL代码的具体转换方法。设计的CAD工具支持数字系统的建模、功能分析与代码转换功能。通过设计示例表明了所述方法和相关工具的有效性。

英文摘要：

Petri net-based digital systems modeling and hardware implementation method is well-studied. However, the exis- ting methods are mainly applied to synchronous circuits. This paper proposed a new approach for the modeling and VHDL im- plementation of digital systems based on an extended class of Petri nets. It defined the generalized synchronous self-modifying net（GSSN） to describe digital systems. Based on a new kind of D flip-flop, known as multi-input and multi-clock D flip-flop, it presented the specific conversion method from Petri nets models to VHDL codes. It developed a CAD tool called GSSNTool which could support modeling, functional analysis of models and automatic code generation for VHDL. It gave a design example to illustrate the application of developed software tool. The result shows the capabilities of the proposed approach.