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Test power reduction using clock disabling
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  • 相关项目：容错计算
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容错计算
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mesh网高效无死锁路由算法
Using weighted scan enable signals to improve test effectiveness of scan-based BIST
Partial path set-up for fault-tolerant routing in hypercube multicomputers
Low Power Scan testing using a two-stage scan architecture
Improving the effectiveness of scan-based BIST using scan chain partitioning
A reconfigurable scan architecture with weighted scan enable signals for deterministic BIST
Scan testing with low power, test application time and reduced test data volume
Scan BIST with biased scan test signals
Reconfigured scan forest for test application cost, test data volume and test power reduction
Fault-tolerant routing and multicasting for hypercube multicomputers based on partial path set-up
Constraining transition propagation for low power scan testing using a two-stage scan architecture
Using weighted scan enable signals to improve the test effectiveness of scan-based BIST
Mesh网中高效无死锁自适应路由算法
无线自组网络中的基于多个支配集的路由协议
低成本的两级扫描测试结构
不规则网络拓扑结构下的多棵树路由算法研究