在分析研究AB类运算放大器的输入和输出级构成原理基础上,提出一种与信号处理模块的输出端匹配并具有一定负载能力的缓冲器的设计。缓冲器采用了AB类运放结构,其输入级采用折叠式共射共基结构,输出级分别采用PNP管和NMOS管作为上拉管和下拉管,结合电路结构的改进使之具有轨到轨(rail-to-rail)的输出特性和很低的静态电流。设计的电路具有开环增益大、静态功耗小、带宽较高等特点。此运放已在1.5μm BCD工艺下实现。测试结果表明,静态电流仅为8.5μA,闭环带宽达200kHz,开环增益为100dB。
A class AB micropower operational amplifier with rail-to-rail output was proposed based on analysis of the input and output stage of class AB operational amplifiers. The folded cascode structure is adopted in its input stage. And a PNP transistor and an NMOS transistor are used as the pull-up and pull-down transistor of its output stage respectively. The operational amplifier features high open-loop gain, low quiescent current and wide -3 dB bandwidth. The circuit was designed and fabricated in 1.5 μm BCD technology. Test results showed that the quiescent current of 8.5 μA, the closed loop bandwidth of 20 kHz and the open-loop gain of 100 dB were successfully achieved.