中文摘要：

针对当前测井仪器接收电路多通道、小体积、低功耗、高效率的设计要求，提出了一种基于FPGA的DPSD算法实现新方法。该方法采用一种简化的正交DPSD处理方法，方便电路和算法的实现；串行ADC采样数据直接进入运算，无需串并转换，在节省FPGA引脚的同时保证了算法效率；用移位累加操作代替乘法操作，极大地降低了算法对FPGA逻辑资源的消耗。在具体FPGA器件上的实现结果表明，该方法能够在不影响算法效率的情况下减少对FPGA引脚占用和近一半的逻辑资源消耗，满足预先的设计要求。

英文摘要：

Aimed at the design requirements of multi-channel, small volume, low-power dissipation and high efficiency of the receiving circuits in logging instrument, an new method of implementing FPGA-based DPSD algorithm is proposed. A handling method of simplified orthorhombic DPSD algorithm is adopted in this method, which makes the implementation of circuit and algorithm easier. The serial ADC sampling data can be used in the operation directly and it is unnecessary to perform serialparallel conversion, which guarantees the algorithm efficiency while taking less FPGA pins. The multiplication operation is replaced by the shift-accumulation operation, which greatly reduces the consumption of the logical resource in FPGA. The imple- mentation result on a specific FPGA device shows that the method, keeping similar algorithm efficiency, can reduce the occupation of FPGA pins and save nearly half of the logical resource consumption, which satisfies the design requirements presented above.