位置：成果数据库 > 会议 > 会议详情页
Efficient Macroblock Pipeline Structure in High Definition AVS Video Encoder VLSI Architecture
  • 所属机构名称：中国计量学院
  • 会议名称：International Symposium on Circuits and Systems Nano-Bio Circuit Fabrics and Systems (ISCAS 2010)
  • 成果类型：会议
  • 会场：Paris, FRANCE
  • 相关项目：基于视觉感知的视频编码去噪预处理研究
作者： Jia, Huizhu|Xie, Don|Qi, Hong Gang|Yin, Hai Bing|Gao, Wen|
同会议论文项目
基于视觉感知的视频编码去噪预处理研究
期刊论文 14 会议论文 15 获奖 8 专利 1 著作 1
同项目会议论文
Multi-stage Motion Vector Prediction Schedule Strategy for AVS HD Encoder
Fast Mode Decision Based on RDO for AVS High Definition Video Encoder
An Intra Prediction Pipeline Architecture Design for AVS Encoder
Hardware Oriented Algorithm Analysis and Modification for High Definition AVS Video Encoder VLSI Imp
VLSI FRIENDLY ME SEARCH WINDOW BUFFER STRUCTURE OPTIMIZATION AND ALGORITHM VERIFICATION FOR HIGH DEF
Cost-Effective Multiresolution Motion Estimation Algorithm for Rate Distortion Optimized High Defini
Hardware Friendly Mode Decision Algorithm for High Definition AVS Video Encoder
An Efficient MB Level Rate Control for H.264/AVC Hardware Encoder Implementation
A hardware-efficient architecture for multi-resolution motion estimation using fully reconfigurable
Adaptive Integer-precision Lagrange Multiplier Selection for High Performance AVS Video Coding
A Low-cost MAD Prediction Algorithm for H.264 Rate Control Facilitating Hardware Implementation
A highly efficient pipeline architecture of RDO-based mode decision design for AVS HD video encoder
Study on Rate-quantization Models Based on Main DCT Coefficient Distribution Models
High Throughput VLSI Architecture for Multi-resolution Integer Motion Estimation in High Definition