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High Throughput VLSI Architecture for Multi-resolution Integer Motion Estimation in High Definition
  • 所属机构名称：中国计量学院
  • 会议名称：SPIE Visual Communications and Image Processing 2010
  • 成果类型：会议
  • 相关项目：基于视觉感知的视频编码去噪预处理研究
作者： Hao Xu|HaiBing Yin|Honggang Qi|Xiaodong Xie|Wen Gao|
同会议论文项目
基于视觉感知的视频编码去噪预处理研究
期刊论文 14 会议论文 15 获奖 8 专利 1 著作 1
同项目会议论文
Multi-stage Motion Vector Prediction Schedule Strategy for AVS HD Encoder
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Cost-Effective Multiresolution Motion Estimation Algorithm for Rate Distortion Optimized High Defini
Hardware Friendly Mode Decision Algorithm for High Definition AVS Video Encoder
An Efficient MB Level Rate Control for H.264/AVC Hardware Encoder Implementation
A hardware-efficient architecture for multi-resolution motion estimation using fully reconfigurable
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Study on Rate-quantization Models Based on Main DCT Coefficient Distribution Models
Efficient Macroblock Pipeline Structure in High Definition AVS Video Encoder VLSI Architecture