针对版图设计阶段越来越严重的布线拥挤问题。提出了一种有效降低布线拥挤度的标准单元布局算法.它是在高质量线长优化布局之后对布线拥挤度进行单独优化.该算法使用一种新的改进的布线模型对芯片的布线情况进行估计,采用以线网为中心移动的优化方法解决局部区域内的布线拥挤问题.实验结果表明,该算法在使线网总长略微增加的同时使芯片的布线拥挤度问题得到了很好的解决.
An efficient placement algorithm for standard cell layout was presented to reduce routing congestion. It is a post processing congestion reduction technique after the high quality wirelength driven placement. It estimates the routing congestion through a new improved routing model and uses a net-centric moving strategy to solve local regional routing problem. The experimental results show that the algorithm solves well the routing congestion problem with a slight increase in wirelength.