为了有效地进行算法行为描述到寄存器传输级结构描述的转换,提出一种同时考虑功能单元功耗、互连功耗和电压转换功耗的模型和基于网络流的低功耗设计方法.首先对给定的数据流图进行单电压高层次综合,然后对单电压综合结果迭代地进行多电压调整;提取每次迭代时需要调整的网络流子图,对该子图运行最小费用最大流增量算法.该方法充分利用前面迭代中得到的优化解,避免了对整个网络流的重复计算.实验结果表明,文中方法在互连功耗、电压转换功耗和总功耗等方面均有较大优化.
In order to transform algorithm behavioral description to register transfer level structural description, a new power model and a low power design method based on network flow are proposed, where function unit power, interconnection power and voltage converting power are taken into consideration. For a given data flow graph, single voltage high level synthesis methods are run first, and then multi-voltage adjustment is done iteratively on the single voltage synthesis results. The network flow sub-graph needed to adjust is extracted from the previous network flow graph and the min-cost max-flow augmentation algorithm is run on it. Experimental results indicate that our method can optimize interconnection power, voltage converting power and total power substantially.