中文摘要：

设计了一种基于FPGA的高精度TDC，通过延迟链插值和多沿采样等方法，达到与全定制专用集成电路相同的时间精度，实测结果好于9ps。采用多路选择器阵列和加法器构造的编码器将转换死时间降低到1个时钟周期。设计还使用了自校准的机制，增加了可移植性，可广泛应用于粒子飞行时间探测、核医学影像等领域。

英文摘要：

It describes an FPGA - based high resolution TDC. Using delay chain and Wave Union methods, this TDC has a resolution of 9 ps, which is comparable to ASIC TDC. The design uses XORs and MUXs to implement a quick I - cycle encoder, which reduces the dead time. Self- calibration method makes the design easy to be migrated into other FPGAs. This TDC can be used in TOF experiment, medical imaging system, etc.