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用于粒子探测器的CMOS FET采样保持电路的设计与仿真

ISSN号：1007-4627
期刊名称：《原子核物理评论》
时间：0
分类：TP342.1[自动化与计算机技术—计算机系统结构;自动化与计算机技术—计算机科学与技术]
作者机构：[1]中国科学院近代物理研究所,甘肃兰州730000, [2]杜阿拉大学物理系,喀麦隆杜阿拉24157
相关基金：国家自然科学基金资助项目资助项目（10735060）;第三世界科学院基金资助项目Acknowledgments This work has been carried in the Institute of Modern Physics （IMP）, Chinese Academy of Sciences（CAS）, which is supported in part by the Third World Academy of Sciences （TWAS）, in part by IMP, CAS, and in part by the National Natural Science Foundation of China （10735060）. We also thank the Deputy Director Mr. Xie Ming and the staff in particular Mr. Liang Qiang and Mrs. Chen Honglian for the logistic and hospitality.

作者： WEMBE TAFO Evariste[1,2], 苏弘[1], 千奕[1], 周朝阳[1], 王同喜[1]

关键词：采样保持, CMOS场效应管, 峰值, 仿真, Track/Hold, CMOS transistor, peak value, simulation

中文摘要：

介绍了一个峰保持电路。该电路适用于silicon strip,Si（Li）,CdZn Te and CsI等探测器,实现采样-保持功能。已成功进行了基于CMOSFET的采样-保持电路的设计和仿真,通过使用Proteus的PSPICE仿真器和BSIMV3.3模型参数完成了电路性能的仿真。同时,实现了采样时间可在60ns到4.44s范围内进行选择,该电路具有较好的线性。

英文摘要：

In this paper,the objective is to realize a Track/Hold Circuit for silicon strip,Si（Li）,CdZnTe and CsI detectors etc.By using CMOS transistor to implement various components in electronic circuit,the Track and Hold circuit only made with CMOS FET is succeeded to be designed and simulated.Performance was characterized using PSPICE simulator with BSIMV3.3 parameters of the Proteus.Several measurements of acquisition time can be made from 60 ns to 4.44 μs related to the output resistance,and the integral nonlinearity is good.

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