介绍了线性预测倒谱系数(Linear Prediction Cepstrum Coefficient,LPCC)提取算法,给出该算法的一种浮点IP核实现模型,并详细描述了各个子模块的设计方法。以VHDL作为设计语言,在ISE、ModelSim软件下完成综合和仿真,并在Xilinx Spartan-3 FPGA目标板上实现设计。采用关键路径流水线实现、资源共享等技术进行优化。该IP核计算结果精度高,运算时间短,已经成功应用在嵌入式语音识别系统中。
This paper introduces (Linear Prediction Cepstrum Coefficient,LPCC)extraction algorithm, proposes a floating-point IP core implementation modal of this algorithm, and describes the design of each sub-module in detail. The design is described with VHDL; synthesis and simulation is completed by ISE and ModelSim development tools. Finally, it has been implemented in Xilinx Spartan-3 FPGA board. This IP core adopts some optimized methods, such as pipeline structure, resource-sharing structure. It has high precision and short process time. It has been used in embedded speech recognition system successfully.