针对多模接收机的应用,提出了引入一条闭环伪通路技术结构的可编程增益放大器,在保持一定的线性度及噪声性能的基础上,以较低的功耗实现较大的带宽。该电路增益步长为2dB,增益变化范围1~39dB。电路中内嵌了直流失调消除模块防止直流漂移引起的阻塞。芯片采用SMIC0.13pm1P8MRFCMOS工艺实现。测试结果表明,在1.2V电源电压、电压增益为30dB情况下,芯片输出三阶交调点为27.5dBm,在最大增益处的噪声系数为25dB,核心电路功耗仅为2.8mW。
A close loop fake path structure is proposed in programmable gain amplifier for multi-mode receiver application to achieve a larger bandwidth and low power while maintaining a certain degree of linearity and noise performance. The PGA provides a gain range of 1-39 dB and gain step of 2 dB The DC offset is attenuated by using an embedded DC offset cancellation module to prevent baseband signal from deep damage. The PGA was fabricated in SMIC 0.13 μm 1P8M RF CMOS process. Experimental results show that its OIP3 is about 27.5 dBm at the voltage gain of 30 dB, the noise figure in the high gain is about 25 dB and the core circuit only consumes 2.8 mW under 1.2 V supply.