中文摘要：

设计一款基于FPGA的高速实时数据采集系统，该系统采用FPGA作为控制器，主要完成通道选择控制及增益设置、A／D转换控制、数据缓冲异步FIFO三部分功能。系统采用Verilog HDL语言，通过软件编程控制硬件实现通道的选择和可编程增益放大器放大倍数的设置，利用FPGA内部自带的RAM设计16位的FIFO，实现数据的缓冲存储。这种基于FPGA的同步采集、实时读取采集数据的方案，可以提高系统采集和传输速度。系统的仿真验证结果显示，所设计的高速实时数据采集系统达到了预期的功能。

英文摘要：

A high speed real - time data acquisition system based on a FPGA is designed in this paper. This system combines three functions of the channel selection to control and gain setting, A/D switching control,and the data buffering asynchronous FIFO by using a FPGA as the controller of a data acquisition system. The channel choosing and gain setting of a programmable gain amplifier could be realized through the software programming controlling hardware by using the Verilog HDL language. A 16 -bit FIFO is designed to accomplish the data buffering memory using the internal RAM in a FPGA. The plan of synchronized acquisition and the real - time read data based on FPGA improves the system speed of data acquisition and the transmission. The simulation results show that the designed high speed real - time data acquisition system has good functions.