提出了一种汉明码译码器改进方法,采用串行数据传输和时序优化的方法来降低汉明码译码器占用的资源和成本,并采用模块式的设计方法,设计了编译码系统仿真平台,详细地阐述了整个系统和各个模块的FPGA实现过程。仿真结果表明,设计的译码器复杂度明显降低。
An improved method for improving Hamming code decoder is proposed. And a method of serial data transmission and timing optimization is devised to reduce the occupied resource and cost of Hamming decoder. A modular design which is used to design the simulation platform of encoded and decoded system is also proposed in this paper. FPGA implementation process of the entire system and the individual module are detailed described. Simulation results show that the complexity of designed decoder is significantly reduced.