介绍了电子式电流互感器国际电工委员会标准IEC60044-8的链路层规则,设计了数据组帧编码模块。针对帧格式中的循环冗余校验(CRC)校验码,通过详细的计算推导,设计出8位并行CRC逻辑电路并应用于现场可编程门阵列(FPGA),在MAX+PlusⅡ环境下进行了仿真,与串行CRC相比.并行CRC的编码速度大为提高。在物理层,将完整的数据帧进行曼彻斯特编码后通过光纤传输圣间隔屡实践证明该方案实时性强准确唐高具有广泛的应用价值。
The link layer rule of IEC 60044-8 standard for electronic current transformers is introduced. The data framing and encoding module is designed. For the CRC(Cyclic Redundancy Check) code in frame format,an 8- bit parallel CRC logical circuit is designed through detailed calculation and derivation and implemented in FPGA(Field Programmable Gate Array),which is simulated under MAX+PlusH. Compared with serial CRC,the encoding efficiency of parallel CRC is considerably higher. In the physical layer,the total data frame is encoded on Manchester code and then transmitted to the bay level using fibers. The result proves that the designed scheme has a wide practical value for its better real- time performance and higher precision.