中文摘要：

氮氧化技术是45 nm及以下技术节点栅介质制备的关键工艺,严格控制由氮氧化工艺所诱发的界面缺陷是提高栅介质质量的重点。研究了形成栅介质氧化层缺失缺陷的原因,并提出了解决方案。结果表明,原位水蒸气生成（ISSG）热氧化形成栅介质氧化层后的实时高温纯惰性氮化热处理工艺是形成栅介质氧化层缺失缺陷的主要原因;在实时高温纯惰性氮化热处理工艺中引入适量的O2,可以消除栅介质氧化层的缺失缺陷。数据表明,引入适量O2后,栅介质氧化层的界面陷阱密度（Dit）和界面总电荷密度（ΔQtot）分别减少了12.5%和26.1%;p MOS器件负偏压不稳定性（NBTI）测试中0.1%样品失效时间（t0.1%）和50%样品失效时间（t50%）分别提高了18%和39%;32 MB静态随机存储器（SRAM）在正常工作电压和最小工作电压分别提高了9%和13%左右。

英文摘要：

Nitrogen oxidation technology is a key preparation process of gate dielectric for 45 nm and beyond technology node. Strictly controlling the interface defects induced by nitrogen oxidation process is the key to improve the quality of the gate dielectric. The formation reasons were investigated and its solution was provided for the gate dielectric oxide missing. The experimental results show that the root cause to form the gate dielectric oxide missing is the real-time high temperature pure inert gas thermal annealing treatment process after the formation of the gate dielectric oxide by in-situ stream generation（ ISSG） oxidation. The gate dielectric oxide missing can be completely eliminated by introducing a mode-rate amount oxygen in the real-time high temperature pure inert gas thermal annealing treatment process. The experimental data show that after the introduction of an appropriate amount oxygen,the interface trap density（ Dit） and the total charge density（ ΔQtot） of the gate dielectric oxide can be reduced by 12. 5% and 26. 1% respectively. The life time of 0. 1% samples failure（ t0. 1%） and 50% samples failure（ t50%） can be increased by 18% and 39% respectively in the p MOS device negative bias temperature instability（ NBTI） test. The yield of 32 MB static random access memory（ SRAM） devices under the normal working voltage and minimal working voltage can be increased about 9% and 13%,respectively.