中文摘要：

A novel LDNMOS embedded silicon controlled rectifier(SCR) was proposed to enhance ESD robustness of high-voltage(HV) LDNMOS based on a 0.5 μm 18 V CDMOS process. A two-dimensional(2D) device simulation and a transmission line pulse(TLP) testing were used to analyze the working mechanism and ESD performance of the novel device. Compared with the traditional GG-LDNMOS, the secondary breakdown current(It2) of the proposed device can successfully increase from 1.146 A to 3.169 A with a total width of 50 μm, and ESD current discharge efficiency is improved from 0.459 m A/μm2 to 1.884 m A/μm2. Moreover, due to their different turn-on resistances(Ron), the device with smaller channel length(L) owns a stronger ESD robustness per unit area.

英文摘要：

A novel LDNMOS embedded silicon controlled rectifier（SCR） was proposed to enhance ESD robustness of high-voltage（HV） LDNMOS based on a 0.5 μm 18 V CDMOS process. A two-dimensional（2D） device simulation and a transmission line pulse（TLP） testing were used to analyze the working mechanism and ESD performance of the novel device. Compared with the traditional GG-LDNMOS, the secondary breakdown current（It2） of the proposed device can successfully increase from 1.146 A to 3.169 A with a total width of 50 μm, and ESD current discharge efficiency is improved from 0.459 m A/μm^2 to 1.884 m A/μm^2. Moreover, due to their different turn-on resistances（Ron）, the device with smaller channel length（L） owns a stronger ESD robustness per unit area.