中文摘要：

针对可重构阵列中处理单元PE（processing elements）的可能故障,提出了一种实用的容错方案.通过分析推导PE阵列的故障概率和硬件开销,得出对于4×4的PE阵列,每行只需设计一个备用PE即可满足容错要求的结论,并提出了一种有效的容错方案,完成了功能仿真与FPGA验证,结果表明该方案可以充分利用备用PE达到容错效果.可重构阵列在SMIC 0.13μmCMOS工艺下工作频率可达203 MHz.

英文摘要：

To solve the fault of PE （processing element） on reconfigurable circuit, presents a practical fault-tolerant solutions. By analyzing and deriving the error probability of PE array and hardware cost, the conclusions is obcaired that only one spare PE is needed in each row for dealing with the error in 4 × 4 PE array, then an effective faulttolerant program is prooosed and the functional simulation and FPGA verification to the circuit are completed. The result show that this design can make full use of spare PEs and repair the fault, and its integrated frequency is up to 203 MHz when using Design Compiler in SMIC 0. 13μm CMOS process standard cell library.