中文摘要：

提出利用瞬态电流测试（IDDT Testing）方法检测数字电路中的冗余固定故障。检测时采用双向量模式，充分考虑逻辑门的延时特性。针对两类不同的冗余固定故障，分别给出了激活故障的算法，在此基础上再对故障效应进行传播。SPICE模拟实验结果表明，该方法能有效地区分正常电路与存在冗余故障的电路，可以作为电压测试方法的一种有益的补充。

英文摘要：

This paper proposes a method to test redundant stuck-at faults of digital circuits by IDDT testing. The scheme uses two patterns and considers the path delay of logic gates. In order to test two kinds of redundant stuck-at faults, the algorithms which can activate and transmit the faults are presented. SPICE simulation experimental re- sults show the proposed method can distinguish the fault circuits and the fault free circuits effectively, and it can be used as a beneficial supplement of voltage test method.