中文摘要：

低开销容错技术是当前软错误研究领域的热点。为了对微处理器进行低开销容错保护,首先就需要对微处理器可靠性（即体系结构弱点因子AVF（Architectural Vulnerability Factor））进行准确评估。然而,现有的AVF评估工具的精确性和适用范围都受到不同程度的限制。该文以微处理器上的核心部件（即存储部件）作为研究对象,对AVF评估方法进行改进,提出了一种访存操作分析和指令分析相结合的AVF评估策略HAES（Hybrid AVFEvaluation Strategy）。该文将HAES融入到通用的模拟器中,实现了更精确和更通用的AVF评估框架。实验结果表明相比其它AVF评估工具,利用该文提出的评估框架得到的AVF平均降低22.6%。基于该评估框架计算得到的AVF更加精确地反映了不同应用程序运行时存储部件的可靠性,对设计人员对微处理器进行低开销的容错设计具有重要指导意义。

英文摘要：

Recent studies on soft errors focus on the low-cost fault tolerant techniques,thus motivating an early and accurate evaluation of microprocessor reliability（i.e.,Architectural Vulnerability Factor（AVF））.However,current AVF evaluation tools have their own limitations in accuracy and applicability.In order to improve the accuracy of AVF estimation of the key structures of microprocessors（i.e.,memories） for low-cost fault tolerant design,this paper proposes a Hybrid AVF Evaluation Strategy（HAES） which combines memory access analysis and instruction identification for AVF evaluation.Then the HAES is integrated into a general simulator and an improved AVF evaluation framework is implemented.Experimental results show that compared with other AVF evaluation tools,AVF computed using the evaluation framework is reduced by 22.6% averagely.AVFs which are estimated using the improved AVF evaluation framework reflect the reliability of memories more accurately,and play a significant role for low-cost fault tolerant design.