This paper proposes a low power wake-up baseband circuit used in Chinese Electronic Toll Collection (ETC) system. To reduce the static power consumption, a low power biasing strategy is proposed. The proposed circuit is fabricated in TSMC 0.18 μm technology with an area of 0.09 mm 2 . Its current consumption is only 2.1 μA under 1.8 V power supply. It achieves a sensitivity of 0.95 mV at room temperature with a variation of only ±28% over -35℃ to 105℃.
This paper proposes a low power wake-up baseband circuit used in Chinese Electronic Toll Collection (ETC) system. To reduce the static power consumption, a low power biasing strategy is proposed. The proposed circuit is fabricated in TSMC 0.18 μm technology with an area of 0.09 mm^2. Its current consumption is only 2.1 μA under 1.8 V power supply. It achieves a sensitivity of 0.95 mV at room temperature with a variation of only ±28% over -35℃ to 105℃.