位置：成果数据库 > 期刊 > 期刊详情页
Yield-Driven Clock Skew Scheduling for Arbitrary Distributions of Critical Path Delays
  • 期刊名称：IEICE TRANSACTIONS on Fundamentals of Electronics,
  • 时间：2012.12.1
  • 页码：2172-2181
  • 相关项目：成品率驱动的纳米尺度集成电路设计方法学研究
作者： Wai-Shing Luk|Yi Wang|Changhao Yan|Xuan Zeng|
同期刊论文项目
成品率驱动的纳米尺度集成电路设计方法学研究
期刊论文 30 会议论文 16 获奖 4
同项目期刊论文
An Integrated Algorithm for 3D-IC TSV Assignment
Post-routing layer assignment for double patterning with timing critical paths consideration
Integrated Algorithm for 3-D IC Through-Silicon Via Assignment
Automated Technology Migration Methodology for Mixed-Signal Circuit Based on Multi-Start Optimizatio
A parallel method for solving laplace equations with dirichlet data using local boundary integral eq
Layout Decomposition Co-optimization for Hybrid E-Beam and Multiple Patterning Lithography
Harvesting Design Knowledge From the Internet: High-Dimensional Performance Tradeoff Modeling for La
Efficient Transient Analysis of Power Delivery Network with Clock/Power Gating by Sparse Approximati
Rapid Estimation of the Probability of SRAM Failure via Adaptive Multi-Level Sliding-Window Statisti
Layout Decomposition with Pairwise Coloring and Adaptive Multi-Start for Triple Patterning Lithograp
MOS Table Models for Fast and Accurate Simulation of Analog and Mixed-Signal Circuits Using Efficien
Automated Technology Migration Methodology for Mixed-Signal Circuit Based on Multistart Optimization
Multi-Parameter Clock Skew Scheduling
Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits via Hidden Markov Tree
带权值目标点的可见覆盖求解算法
一种基于电路划分的模拟电路IP核保护算法
无向图的层次化谱分析同构判定算法