介绍基于BU-61580和FPGA的1553BRT终端控制器的设计.重点阐述BU-61580的硬件连接和FPGA读写RAM的时序控制。
The design of 1553B RT terminal controller based on BU-61580 is designed. The hardware circuit design of BU-61560 and sequential control of reading and writing RAM through FPGA are discussed in detail.