中文摘要：

在结合应变Si,高k栅和SOI结构三者的优点的基础上,提出了一种新型的高k栅介质应变Si全耗尽SOIMOSFET结构.通过求解二维泊松方程建立了该新结构的二维阈值电压模型,在该模型中考虑了影响阈值电压的主要参数.分析了阈值电压与弛豫层中的Ge组分、应变Si层厚度的关系.研究结果表明阈值电压随弛豫层中Ge组分的提高和应变Si层的厚度增加而降低.此外,还分析了阈值电压与高k栅介质的介电常数和应变Si层的掺杂浓度的关系.研究结果表明阈值电压随高k介质的介电常数的增加而增大,随应变Si层的掺杂浓度的提高而增大.研究了该结构的短沟道效应SCE（short channel effect）和漏致势垒降低DIBL（drain induced barrier lowering）效应,结果表明该结构能够很好地抑制SCE和DIBL效应.

英文摘要：

A strained Si fully depleted SOI MOSFET,which has the advantages of strained Si,high-k gate and SOI structure,is presented in this paper.A two-dimensional analytical model for the threshold voltage in strained Si fully depleted SOI MOSFET with high-k dielectric is proposed by solving Possion＇s equation.Several important parameters are taken into account in the model.Relationships between threshold voltage,Ge Profile and thickness of strained silicon are investigated.The result shows that the threshold voltage decreases with Ge Profile and strained silicon thickness increasing.Relationships between threshold voltage,dielectric constant of high k gate and doping conceration of strained silicon are also investigated.The result shows that the threshold voltage increases with dielectric constant of high-k and doping conceration of strained silicon increasing.SCE and DIBL are analyzed finally,which also demonstrate that this novel device can suppress SCE and DIBL effect greatly.