中文摘要：

FPGA和ASIC是高清视频编码器较合适的实现平台,视频编码芯片架构设计面临着较多挑战,包括吞吐量巨大、外存带宽极高、硬件资源消耗大、数据依赖阻塞正常流水、多目标性能较难均衡等。高清视频编码芯片架构设计需和算法优化相结合,以实现多个目标参数之间均衡,如何评价硬件架构的多目标性能,是首先要解决的问题。在分析芯片架构设计面临挑战、典型关注的多目标性能基础上,提出多目标性能参数的度量方法,对多个目标参数进行合理映射和归一化处理,并首次提出多目标性能评价模型。基于此模型,对主流的高清H.264/AVC编码芯片架构的多目标性能进行了评价和比较。该研究对于优化H.264/AVC及新一代HEVC编码芯片架构有着重要的参考价值。

英文摘要：

FPGA and ASIC are the proper implementation platforms for high-definition video encoder. Design of video encoder architecture encounters quite a few challenges, such as high throughput burden, extremely high external memory access bandwidth, high hardware resource cost, data dependency chokes normal pipelining, and difficulties in multiple targets performance trade-off. The design of high-definition video encoder architecture is supposed to be in combination with the algorithm optimisation for realising the trade-off between the performances of multiple targets. How to evaluate the multiple target performance of hardware architecture is the problem having to be solved first. In this paper, we propose the metric method for multiple target performance parameters on the basis of analysing the encountering challenges of chips architecture design and the muhiple target performance typically concerned, and make reasonable mapping and normalisation process on multiple target parameters, then we propose＇ at the first time the evaluation model for multiple target performance. The multiple target performances of predominating high definition H. 264/AVC encoder architectures are evaluated and compared with this model. Our study is of meaningful and valuable as the reference for the optimisation of H. 264/AVC and next generation HEVC eneoder architectures.