以含阵列电极的SOI硅基芯片与PDMS盖片制成的复合电泳芯片为对象,研究芯片电泳过程中芯片微管道的特殊表面电化学性质.实验采用电流监测法,利用溶液探针测试体系来表征微管道的电绝缘性,由于工艺缺陷或芯片长时间使用引起的绝缘层不同程度的损坏,导致在充液管道中产生的10-500μA的基底电流,这又导致不同程度焦耳热,进而导致电渗流无法稳定和芯片电泳过程无法正常进行.实验提出通过优化硅-PDMS电泳芯片的结构设计来避免和减小基体电流,同时采用以导热硅酯为介质的散热器对硅片试验体系进行散热,进一步减小焦耳热的影响以获得稳定的电渗流.在此基础之上,实验测得硅-PDMS微管道中的电渗迁移率为3.9×10^-4cm^2/V.s,伏安曲线显示5mmol硼砂缓冲中最大施加电压为260V/cm;采用本文提出的复合芯片系统,分离FITC标记的精氨酸和苯丙氨酸混合样品,分离度达到3.14,柱效分别达到18000和25000.
Electrophoresis microchip containing Arrayed electrodes was fabricated with silicon base and PDMS cover plate, by means of combining standard semiconductor lithography technology with dry etching in Silicon on Insulator, of which the surface electrochemical characteristics in micro channel was investigated. With current-monitoring method, buffer solution drop was taken as probe to characterize the isolation ability of silicon channel. The isolation layer was likely to be damaged for fabrication bug or long-term operation of the chip, which lead to background current of 10-500 μA in buffer filled channel, meanwhile, Joule heating became extremely significant, which made the EOF unsteady and the electrophoresis device unworkable. According to the characterization results, optimum chip design was presented to eliminate background current and then radiator was employed to stick to the chip bottom via heat transmittable silicon ester to furthermore decrease the Joule heating. Applying the optimum system, the maximum applied voltage was 260 V/cm with 5 mmol borate buffer. The electroosmosis mobility of silicon-PDMS chip was monitored to be 3.9×10^-4 cm/V · s. FITC labeled argine and phenylalanine was successfully separated in this system with a resolution of 3.14 and the performance could be as high as 18 000 and 25 000 plates per meter, respectively.