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Low power mapping for AND/XOR circuits and its application in searching the best mixed-polarity
  • ISSN号:1674-4926
  • 期刊名称:Chinese Journal of Semiconductors
  • 时间:2011
  • 页码:0250071-0250076
  • 分类:TP391.41[自动化与计算机技术—计算机应用技术;自动化与计算机技术—计算机科学与技术] TN432[电子电信—微电子学与固体电子学]
  • 作者机构:[1]Institute of Circuits and Systems, Ningbo University, Ningbo 315211, China
  • 相关基金:Project supported by the National Natural Science Foundation of China (Nos. 61076032, 60776022), the Postdoctoral Science Foundation of China (No. 20090461355), the Postdoctoral Research Projects of Zhejiang Province, China, and the Natural Science Foundation of Zhejiang Province, China (No. Y 1101078).
  • 相关项目:基于智能算法的MPRM电路极性优化研究
中文摘要:

<正>A low power mapping algorithm for technology independent AND/XOR circuits is proposed.In this algorithm,the average power of the static mixed-polarity Reed-Muller(MPRM) circuits is minimized by generating a two-input gates circuit to optimize the switching active of nodes,and the power and area of MPRM circuits are estimated by using gates from a given library.On the basis of obtaining an optimal power MPRM circuit,the best mixed-polarity is found by combining an exhaustive searching method with polarity conversion algorithms. Our experiments over 18 benchmark circuits show that compared to the power optimization for fixed-polarity Reed-Muller circuits and AND/OR circuits,power saving is up to 44.22%) and 60.09%,and area saving is up to 14.13%and 32.72%,respectively.

英文摘要:

A low power mapping algorithm for technology independent AND/XOR circuits is proposed. In this algorithm, the average power of the static mixed-polarity Reed-Muller (MPRM) circuits is minimized by generating a two-input gates circuit to optimize the switching active of nodes, and the power and area of MPRM circuits are estimated by using gates from a given library. On the basis of obtaining an optimal power MPRM circuit, the best mixed-polarity is found by combining an exhaustive searching method with polarity conversion algorithms. Our experiments over 18 benchmark circuits show that compared to the power optimization for fixed-polarity Reed-Muller circuits and AND/OR circuits, power saving is up to 44.22% and 60.09%, and area saving is up to 14.13% and 32.72%, respectively.

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期刊信息
  • 《半导体学报:英文版》
  • 中国科技核心期刊
  • 主管单位:中国科学院
  • 主办单位:中国电子学会 中国科学院半导体研究所
  • 主编:李树深
  • 地址:北京912信箱
  • 邮编:100083
  • 邮箱:cjs@semi.ac.cn
  • 电话:010-82304277
  • 国际标准刊号:ISSN:1674-4926
  • 国内统一刊号:ISSN:11-5781/TN
  • 邮发代号:2-184
  • 获奖情况:
  • 90年获中科院优秀期刊二等奖,92年获国家科委、中共中央宣传部和国家新闻出版署...,97年国家科委、中共中央中宣传部和国家新出版署三等奖,中国期刊方阵“双效”期刊
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  • 被引量:7754