中文摘要：

在设计的电流舵DAC中应用了一种新的译码结构，即斐波那契数列译码结构。通常电流舵DAC设计基于面积和精度的折衷考虑，会采用高位温度计译码，低位二进制译码的分段结构，在此设计的电流舵DAC为进一步提高精度，高位6位仍采用温度计译码，低6位用斐波那契数列译码代替二进制译码。仿真测得DAC转换器的积分非线性误差（INL）为0.5 LSB，微分非线性误差（DNL）为0.28 LSB。在10 MHz采样率下，无杂散动态范围（SFDR）达85 dB。

英文摘要：

A new decoding structure,Fibonacci series decoding structure,is adopted in a self-designed current-steering digital-to-analog converter（DAC）. The segmented structure is usually adopted in the design of current-steering DAC to balance area and accuracy,in which upper bit uses unary sequence and lower bit uses binary sequence. In order to improve the preci-sion further more,6-bit Fibonacci sequence decoding is used to replace the lower 6-bit binary sequence. The simulation results verify that the differential nonlinearity（DNL）error 0.28 LSB and the integral nonlinearity（INL）error is 0.5 LSB,and the spur free dynamic range（SFDR）reaches 85 dB with the sampling rate of 10 M.