欢迎您！东篱公司
退出
-
申报数据库
-
立项数据库
-
成果数据库
-
项目获奖数据库
中文摘要：
针对时频测量出现的±1误差，即极短的时间间隔，提出一种基于多周期同步与模拟内插结合的时间电压转换法。利用D触发器、集成运放等设计了该方法的相应电路，成功实现了不受时钟频率影响的测量模块，并将测量误差减小至0．02％，减小了极短时间间隔对测量精度的影响。
英文摘要：
Aiming at ±1 error in the measurement of time-frequency, which is a very short time interval, a time to voltage conversion method based on multi-cycle synchronization and analog interpolation combination is proposed. A circuit is designed to implement this method by using D flip-flop and integrated operational amplifier. The measuring module regardless of the clock frequency is successfully achieved, the measurement error is reduced to 0.02%, the effect of measurement accuracy by the very short time interval is effectively reduced.
同期刊论文项目
同项目期刊论文
期刊信息
位置：