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Full 3-D simulation of gate line edge roughness impact on sub-30 nm FinFETs
  • 所属机构名称：北京大学
  • 会议名称：Silicon Nanoelectronics Workshop, 2008. （SNW 2008）. IEEE
  • 成果类型：会议
  • 相关项目：纳米工艺下可制造性和成品率驱动的集成电路设计方法学研究
作者： Yuncheng Song|Jinfeng Kang|Shimeng Yu|Ruqi Han|Xiaoyan Liu|Yuning Zhao|Gang Du|
同会议论文项目
纳米工艺下可制造性和成品率驱动的集成电路设计方法学研究
期刊论文 14 会议论文 37 专利 10
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