中文摘要：

高阶连续时间型ΣΔ调制器提供了一种有效的获得高分辨率、低功耗模数转换器的方法.提出了一种新型的2-1-1级联的连续时间型ΣΔ调制器结构.采用冲激不变法将离散时间型ΣΔ调制器变换为连续时间型ΣΔ调制器,利用Simulink对该调制器进行系统级建模和仿真,峰值信噪比达到105dB.分析了电路的非理想因素对调制器行为的影响,以获得90dB信噪比为目标确定了电路子模块指标.仿真结果表明,该结构能有效降低系统功耗,并验证了电路的可行性.

英文摘要：

High order continuous-time ΣΔ modulator provides an effective way to realize analog-digital converters of high resolution and low power consumption.A novel 2-1-1 cascaded continuous-time ΣΔ modulator has been proposed by transforming the discrete-time ΣΔ modulator to the continuous-time one using the impulse-invariant transformation.The continuous-time ΣΔ modulator is modeled and simulated using Simulink,obtaining a peak signal-to-noise ratio of 105 dB.The effects of circuit non-ideal factors on the modulator performance are then analyzed.The detailed indices of circuit sub-modules are determined by setting a signal-to-noise ratio of 90 dB as the design aim.Simulation results indicate that this modulator architecture can lower the system power consumption effectively,and the feasibility of circuits is successfully verified.