SDRAM作为大容量存储器在高速图像处理中具有很大的应用价值。但由于SDRAM的结构和SRAM不同,其控制比较复杂。文章详细介绍了SDRAM存储器的结构、接口信号和操作方法,以及SDRAM控制器的设计方法。结合实际系统,设计给出了使用FPGA实现SDRAM控制器的硬件接口,在Ahera公司的主流FPGA芯片EP1C6Q240C8上,通过增加流水级数和将输出触发器布置在IO单元中,该控制器可达到185MHz的频率。
As the mass storage devices, SDRAM is great valuable in high speed image storing system. Due to the different structure of SDRAM and SRAM, the control of SDRAM is more complex than that of SRAM. The structure, interface signal and operation method of SDRAM and SDRAM controller are introduced in this article. The SDRAM controller based on FPGA is designed and used in real system. On the mainstream FPGA chip EP1C6Q240C8, by adding the pipeline level and arranging the output in the IO element, this controller has reached to the performance of 185 MHz.